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PROSA - Formally Proven Schedulability Analysis
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Lasse Blaauwbroek
PROSA - Formally Proven Schedulability Analysis
Commits
7ac7144a
Commit
7ac7144a
authored
8 years ago
by
Felipe Cerqueira
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Avoid using Proof Irrelevance
parent
fdb964d0
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3 changed files
model/basic/arrival_sequence.v
+1
-1
1 addition, 1 deletion
model/basic/arrival_sequence.v
model/basic/jobin_eqdec.v
+1
-1
1 addition, 1 deletion
model/basic/jobin_eqdec.v
util/tactics.v
+0
-20
0 additions, 20 deletions
util/tactics.v
with
2 additions
and
22 deletions
model/basic/arrival_sequence.v
+
1
−
1
View file @
7ac7144a
...
...
@@ -143,7 +143,7 @@ Module ArrivalSequence.
rewrite
mem_pmap
;
apply
/
mapP
;
exists
j
;
first
by
destruct
j
as
[
j
arr_j
ARR
]
.
destruct
j
as
[
j
arr_j
ARR
]
.
unfold
is_JobIn
;
des_eqrefl
;
first
by
repeat
f_equal
;
apply
pr
oo
f
_irrelevance
.
unfold
is_JobIn
;
des_eqrefl
;
first
by
repeat
f_equal
;
apply
b
oo
l
_irrelevance
.
by
simpl
in
*
;
unfold
arrives_at
in
*
;
rewrite
ARR
in
EQ
.
}
Qed
.
...
...
This diff is collapsed.
Click to expand it.
model/basic/jobin_eqdec.v
+
1
−
1
View file @
7ac7144a
...
...
@@ -13,7 +13,7 @@ Definition jobin_eqdef (arr_seq: arrival_sequence Job) :=
unfold
jobin_eqdef
in
*.
move
:
EQ
=>
/
andP
[
/
eqP
EQjob
/
eqP
EQarr
]
.
destruct
x
,
y
;
ins
;
subst
.
f_equal
;
apply
pr
oo
f
_irrelevance
.
f_equal
;
apply
b
oo
l
_irrelevance
.
}
{
apply
ReflectF
.
...
...
This diff is collapsed.
Click to expand it.
util/tactics.v
+
0
−
20
View file @
7ac7144a
...
...
@@ -19,12 +19,6 @@ Open Scope list_scope.
Set
Implicit
Arguments
.
Unset
Strict
Implicit
.
(* ************************************************************************** *)
(** * Axioms *)
(* ************************************************************************** *)
Require
Export
ProofIrrelevance
.
(* ************************************************************************** *)
(** * Very basic automation *)
(* ************************************************************************** *)
...
...
@@ -145,7 +139,6 @@ Ltac vlib__clarify1 :=
|
[
H
:
?x
=
true
|
-
_]
=>
rewrite
H
in
*
|
[
H
:
?x
=
false
|
-
_]
=>
rewrite
H
in
*
|
[
H
:
is_true
(_
==
_)
|
-
_]
=>
generalize
(
vlib__beq_rewrite
H
);
clear
H
;
intro
H
|
[
H
:
@
existT
_
_
_
_
=
@
existT
_
_
_
_
|
-
_]
=>
apply
inj_pair2
in
H
;
try
subst
|
[
H
:
?f
_
=
?f
_
|
-
_]
=>
vlib__complaining_inj
f
H
|
[
H
:
?f
_
_
=
?f
_
_
|
-
_]
=>
vlib__complaining_inj
f
H
|
[
H
:
?f
_
_
_
=
?f
_
_
_
|
-
_]
=>
vlib__complaining_inj
f
H
...
...
@@ -164,19 +157,6 @@ Ltac clarify :=
|
H1
:
?x
=
Some
_,
H2
:
?x
=
Some
_
|
-
_
=>
rewrite
H2
in
H1
;
vlib__clarify1
end
;
(* autorewrite with vlib_trivial; *)
try
done
.
(** Kill simple goals that require up to two econstructor calls. *)
Ltac
vauto
:=
(
clarify
;
try
edone
;
try
(
econstructor
(
solve
[
edone
|
econstructor
(
edone
)
])))
.
(** Check that the hypothesis [id] is defined. This is useful to make sure that
an [assert] has been completely finished. *)
Ltac
end_assert
id
:=
let
m
:=
fresh
in
pose
(
m
:=
refl_equal
id
);
clear
m
.
Ltac
inv
x
:=
inversion
x
;
clarify
.
Ltac
simpls
:=
simpl
in
*
;
try
done
.
Ltac
ins
:=
simpl
in
*
;
try
done
;
intros
.
...
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