- Apr 25, 2017
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Tianqi Chen authored
* [PASS] StorageRewrite, reuse memory pass as in NNVM. * fix issue
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- Apr 22, 2017
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Tianqi Chen authored
* [LANG/CODEGEN] Intrinsics and Extern Math * fix lint
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- Apr 21, 2017
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Tianqi Chen authored
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- Apr 18, 2017
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Tianqi Chen authored
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- Apr 15, 2017
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Tianqi Chen authored
* [PERF] Persitent kernel * fix doc
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- Apr 09, 2017
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Tianqi Chen authored
* [SCHEDULE] Add group, refactor thread bind api. * fix doc * fix g++-4.8 * More testscase * Remove graph context from fix pt analysis
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- Apr 01, 2017
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Tianqi Chen authored
* [LANG/GPU] Cross Thread Reduction. * Fix doxygen error * Upgrade verilog testcase to new one
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- Mar 29, 2017
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Tianqi Chen authored
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- Mar 26, 2017
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Tianqi Chen authored
* [CODEGEN] Refactor common codegen, Verilog Codegen * fix make * fix mk * update enable signal * change function name to at neg edge * Move test to correct place
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- Mar 17, 2017
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Tianqi Chen authored
* [VERILOG] VPI Mem Interface/ VPI MMap * fix test issues
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- Mar 14, 2017
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Tianqi Chen authored
* [RUNTIME] Refactor runtime to be DLPack compatible. Enable plugin of new runtime. * fix mac compile * ok
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Tianqi Chen authored
* [VERILOG] Basic Verilog Testflow * fix build * fix the comment * fix lint in verilog
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- Mar 12, 2017
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Tianqi Chen authored
* [OP/LANG] Support Extern Call, more regression tests * [TEST] Include pylintrc
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Tianqi Chen authored
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- Mar 05, 2017
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Tianqi Chen authored
* [IterVar/REFACTOR] Add types to IterVar * [ARITH/REFACTOR] Move IntSet to include * [REFACTOR/OP] Move Op detail to seperate folder. * fix test
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- Mar 04, 2017
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Ziheng Jiang authored
* loop_partition draft * divide loop variable into constant domain and variable domain & consider multiple partitions * process doubt interval * fix and refactor, add relax_map arg in BoundDeduce * fix testcase and comment * rebase to zero, convert to SSA * change the logic of generating loop code & fix issues * add a testcase for relax map in deducebound && fix issues * clean code * const auto& * add test_multi_if
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- Mar 01, 2017
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Tianqi Chen authored
* [ARITH/VISITOR] Modular Analysis, ExprFunctor, StmtFunctor * retrigger * [IRFunctor] Migrated CodegenC * [IRFUNCTOR] Migrate CodeGenLLVM * [IRFunctor] Migrate canonical * [IRFunctor] Migrate vectorize * [IRFunctor] migrate CodeGenStackVM
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- Feb 26, 2017
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Tianqi Chen authored
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Tianqi Chen authored
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- Feb 24, 2017
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Tianqi Chen authored
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- Feb 22, 2017
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Tianqi Chen authored
* [LLVM] Initial support for codegen LLVM. * Fix the naming issue of codegen
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- Feb 20, 2017
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Tianqi Chen authored
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- Feb 17, 2017
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Tianqi Chen authored
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- Feb 14, 2017
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Tianqi Chen authored
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- Feb 12, 2017
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Tianqi Chen authored
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Ziheng Jiang authored
* [PASS] Change IRVisitor interfaces to function override * [PASS] Change IRMutator interfaces to overloadable function
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- Feb 11, 2017
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Tianqi Chen authored
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- Feb 09, 2017
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Tianqi Chen authored
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Ziheng Jiang authored
* [FUSION] add Fusion(Schedule) * [FUSION] rename to AutoFuseEwise, detect whether the stage has been scheduled * [FUSION] change to visitor pattern * [FUSION] rename filename * [FUSION] fine-tune the interface * [FUSION] typo * move elem_wise to schedule * rename test function
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- Feb 07, 2017
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Tianqi Chen authored
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Tianqi Chen authored
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- Feb 05, 2017
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Tianqi Chen authored
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- Feb 04, 2017
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Tianqi Chen authored
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- Feb 02, 2017
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Tianqi Chen authored
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- Jan 31, 2017
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Tianqi Chen authored
[TEST/PYTHON] Add unittest folder, add a build pipeline. Rename Buffer.ptr to Buffer.data to be consistent with Array. (#29)
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Tianqi Chen authored
* [CODEGEN] CUDA/OPENCL pipeline complete * Hide TVMType by str in frontend
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- Jan 29, 2017
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Tianqi Chen authored
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- Jan 25, 2017
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Tianqi Chen authored
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- Jan 24, 2017
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Tianqi Chen authored
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- Jan 23, 2017
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Tianqi Chen authored
* [CODEGEN] Add LoweredFunc, MakeAPI and SplitHostDevice * update halideir
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