+ Add check for whether the ports listed under `CLOCK_PORT` in fact exist in the top-level module
- Remove misleading CTS log print

Co-authored-by: Mohamed Gaber <donn@efabless.com>

~ Reimplemented the default serial/parallel multiplier to be a bit less cryptic and eliminate linter warnings; and added a proper testbench
~ Reimplemented deprecated variable translation behavior to account for the situation where a deprecated variable's value does not match the default for the new value, which causes a crash
~ Slightly improved warning for designs having been black-boxed during STA
~ PDN Generation Updates
    ~ Renamed `DESIGN_IS_CORE` to `FP_PDN_MULTILAYER` with translation behavior
    ~ PDN generation will now always attempt to extend to core ring (which is inert if core rings do not exist)
    ~ Fixed bug where `FP_PDN_MULTILAYER` being set to `0` would attempt to create a core-ring on two layers anyway
~ IR drop now prints a warning if `VSRC_LOC_FILE` is not provided
- Removed deprecation behavior for `GLB_RT` variables - it's been over a year (>=6 mo as promised)

~ Classified PDK variables by user modifiability
~ `SYNTH_MAX_FANOUT` -> Moved into PDK as `MAX_FANOUT_CONSTRAINT`
~ `SYNTH_MAX_TRAN` -> Moved into PDK as `MAX_TRANSITION_CONSTRAINT`
~ `SYNTH_CAP_LOAD` -> `OUTPUT_CAP_LOAD`
- Removed `DEFAULT_MAX_TRAN` from PDK (unused)

~ set min distance in cfg file instead of using `FP_IO_MIN_DISTANCE`
~ don't quit when min distance < legal min distance and use legal min distance. by definition if min distance is illegal it is "minimum" and we can use a higher value
~ `min_distance` is not min spacing - adjust legal tracks in `io_place.py` under that assumption

+ integrate `FP_IO_MIN_DISTANCE`
~ respect min spacing while placing pins
~ print on which side requested pins exceed allowed number of pins

misc:
~ tap_decap step generate output to tmp instead of result
~ gen_pdn step generate output to result instead of tmp because it is the final step in floorplan stage

+ Add test for JSON config files
~ Updated various `rm` execs to `file delete -force`
~ Test script now outputs to stdout as well as a log file
~ Moved post-run hook runner to `all.tcl`
~ Moved installation docs to their own subcategory
~ Fix security bug

+ Add PDK matrix to `pdk_build` step 
~ Redo how test_sets are written
~ Redo design matrix to include PDK
~ Update deprecated Node.js-based GitHub Actions
~ Unify gf180mcuC config keys as "pdk::gf180mcu*"

+ Formalized concept of "exposed variables", environment variables that are exposed to `config.json` during processing
+ `dir::` is no longer a special case: all `ref::` prefices referencing a path now have the ability to glob inside said path
+ Made `dir::`, `pdk_dir::` and `scl_dir::` short-hands for various `ref::`s

APU, spm  xtea, usb, zipdiv, usb_cdc_core, wbqspiflash, PPU, picorv32a, y_huff, salsa20

+ Add config variable `FP_PDN_SKIPTRIM` that passes the `-skip_trim` variable to `pdngen`

+ Add gf180mcuC configs for {APU, PPU, SPM}
~ Clean up some leftover variables
~ STD_CELL_LIBRARY now an optional environment variable- open_pdks config files are now responsible for setting the default
~ `to_tcl.py` updated to reflect that ^
~ Add ability to just set `METAL_LAYER_NAMES` in open_pdks
~ `open_pdks` -> 44a43c23c81b45b8e774ae7a84899a5a778b6b0b

+ Create new IR drop report generation step in the `signoff` stage
+ ALMOST ALL STEPS NOW PRINT THEIR LOGS' PATH
~ `increment_index/TIMER/set log/puts_info` commands organized across the board
~ Fix issue where `FP_PDN_AUTO_ADJUST` would not snap its values to the mfg grid
~ Reorder `configuration/general.tcl`
~ Update Contribution Guidelines
~ Various Docs Fixes
- Remove `FP_PDN_IRDROP`

+ Add feature to match PDK names using Python `fnmatch`, allowing wildcards in `config.json` `pdk::` statements
~ open_pdks -> `e8294524e5f67c533c5d0c3afa0bcc5b2a5fa066`
- Remove "dependencies" field from tool_metadata.yml
- Removed sky130 version from tool_metadata.yml, tracked through the open_pdks "sky130.json" file instead
- Removed CVC scripts, placed in the PDK

+ Added "logging to" information for long-running steps (CTS and Routing)
+ Added variable `GPL_CELL_PADDING` for global placement, with a default value of 0 (value divided by 2 and applied to both the left and right of the cell)
+ Add feature to also print mounted scripts' version if the container version does not match
+ Add `insert_tiecells` after floorplanning
~ `replace.tcl`, `opendp.tcl` -> `gpl.tcl`, `dpl.tcl`
~ `CELL_PAD` renamed `DPL_CELL_PADDING` for detailed placement, default value still 4, value divided by 2 and applied to both the left and right of the cell
~ DONT_BUFFER_PORTS given a default value (empty)
~ `remove_buffers` -> `remove_buffers_from_ports` (to more explicitly state what it does)
~ Renamed `RUN_ROUTING_DETAILED` to `RUN_DRT` (with translation behavior)
~ Cleanup OR antenna check
- Removed `CELL_PAD` from metrics and comparison
- Removed `widen_site_width`, `use_widened_lefs` and `use_original_lefs`: I don't know who used site widening
- Removed `MERGED_LEF_UNPADDED`: `MERGED_LEF` can be used for all places where the "unpadded" one was used

+ JSON Configs now support per-PDK and per-SCL options
+ JSON Configs now have a limited expression engine and a way to specify the current working directory and glob inside of it
+ Created script to help migrate tcl configs to json configs
+ `-init_design_config` rewritten, now creates an `openlane` folder inside the design's directory. New flag `-add_to_designs` restores the previous behavior
+ `docs/source/configuration_files.md` created with a focus on documenting how the configuration files work, including the JSON configuration files
~ Update `picorv32` design
~ Most `config.tcl`s replaced with `config.json` alternatives
~ Global configuration files now loaded in a specific order with no glob
~ Changed default values for PL_TARGET_DENSITY
~ Documentation updates to support the use of configuration JSON files as a first class citizen
~ Update author list
~ Replicate override_env after second design source
~ Move verify_mismatches to before most preparation
~ flow.tcl no longer requires `-design`, is happy to use the current working directory as a default
~ replicate.py rewritten
~ update.py not rewritten, but uses click now (and an improved --help)
- Removed "flag documentation" for some python scripts, just use `--help`

+ Adds the option to treat unmatched design pins in `PIN_CFG` file as error and terminate, enabled by default
~ Fix FP_PDN_MACRO_HOOKS documentation

* Update to use the new C++ pdngen in OR

designs/inverter: updated die area to be a multiple of site size
designs/s44: has no need for a custom cfg so just removed it

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* For spm turn off FP_PDN_AUTO_ADJUST

The /8 hack produces an off-grid result.  I just manually set the
values to something reasonable.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Update to the latest OR version

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Restore default setting of VDD_NET/GND_NET

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* For inverter turn off FP_PDN_AUTO_ADJUST

The /8 hack produces an off-grid result.  I just manually set the values
to something reasonable.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Update OR version to get pdn via enclosure fix.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Add -extend_to_core_ring to add_pdn_stripe for rings outside the die area

This happens on caravel_upw.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Update OR for cut enclosure parsing in odb

Commit cf8d8dc8091612f7948cfc9f19d6cfdf9913e72d

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Modifed caravel_upw to have to instances connected to different supplies

This is a better test of multi-power pdngen

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Update pdn scripts for new pdngen in OR

Remove the looping over different supplies and run pdngen once with a
full configuration using secondary supplies.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* check FP_PDN_MACRO_HOOKS is set

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* update OR for via env above/below fix

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

* Update OR to get dpl fix for flipped cells

Issue reported in The-OpenROAD-Project/OpenROAD#1840 which was triggered
by the OR version update for pdngen.

Signed-off-by: Matt Liberty <mliberty@eng.ucsd.edu>

+ Add GLB_RT_MACRO_EXTENSION option
+ Restore GLB_RESIZER_TIMING_OPTIMIZATIONS for five designs failing hold violations
~ Set GLB_RT_ADJUSTMENT to 0.3 across the board based on advice in #848
~ ROUTING_OPT_ITERS -> DRT_OPT_ITERS (for consistency)
- Disable `aes_cipher` in extended test set (I gave up)

+ Added ability to run extended test sets on a specific pull request's PR by adding `[ci ets]` anywhere in the PR body (the example there counted!)
+ Added capacity to disable certain designs in a test set by prefixing the design with a `#`
+ Added new script that allows someone to iterate on a design's timing closure 
~ Decreased core utilization for some designs that just aren't routing
~ Fixed sizes of {BM64, blabla, y_huff} to avoid pin location issue
~ Increased max buffer percentages for some designs failing to achieve timing closure
~ Update all references to the design directory in config.tcl for all designs to `$::env(DESIGN_DIR)`.
~ core area/die area no longer have an EOL at the end of their value

+ `RT_{MIN,MAX}_LAYER` added to the PDK, relies on layer names
+ `FP_IO_{H,V}LAYER` added to the PDK, relies on layer names
+ `DRT_{MIN,MAX}_LAYER` optional override variables added
~ Minimum layer set to `met1` in the PDK, you have to enable `li1` manually
~ `GLB_RT_LAYER_ADJUSTMENTS` was moved to the PDK
~ io_place.py API redone in click, now also uses layer names
- `FP_IO_{H,V}METAL` removed, will be translated to the new ones on-the-fly if they're in a user's config (for now.)
- `GLB_RT_{MIN,MAX}LAYER` and its clock equivalents deprecated, will automatically be changed to the new ones on the fly

- Removed the `-min/-max` options from read_liberty since they shouldn't be used for modeling different process corners (https://github.com/The-OpenROAD-Project/OpenLane/issues/671). 
- Updated the base SDC file to include information about clock uncertainty, clock transition, and timing derate.
- Updated the timing/design optimizations to be done at the typical corner.
- Updated the STA script to generate the SDF file after the routing is concluded. 
- Updated the STA script to report more information like clock skew, worst slack, power, area.
- Added some fixes to the report generation to retain the log file index so that we can easily keep track of when the reports are generated. 

* Initial Set Of Changes
+ Made openroad binary customizable with OPENROAD_BIN env var: defaults to `openroad`
+ OL Install allows for customizable flow.tcl for testing
+ OR Issue now explicitly requires input and output defs as arguments
+ Updated routing commands
- Removed standalone tritonroute
- Removed CTS sqr_cap/sqr_rest options (no longer supported)

* Partial Merge Of The-OpenROAD-Project/OpenLane#472

Co-authored-by: Osama Hammad <osama21@aucegypt.edu>

* Fixed Docker Environment
`import opendbpy` -> `opendb`
eigen is an archive now
Removed Diamond Search Height Completely

* Remove Minimum Distance, FP w/ layer numbers

(per discussion with @osamahammad21)

* Update PDK

~ Install new version of Git to handle Open_PDK's cloning woes
~ Update Commit Hash With Fixes To `download.sh`
~ Address The-OpenROAD-Project/OpenLane#475 while I'm here

* Update OpenROAD, Remove Standalone OpenSTA

* Remove Standalone OpenDP

* Update TritonRoute Invocation

+ Random Seed Specified
+ Removed deprecated values from .params file
(Not gonna remove .params file just yet)
+ Updated or_issue.py to handle incomplete file paths

* update report layer usage

* Makefile Tweaks

- Decreased duplication
~ Now using long flags (See #476)

* Updates to run_designs, OR commit

* number of grt antenna repairer iterations

* Update Magic & Netgen for LVS Issue

- Remove blabla from completeTestSet pending RTimothyEdwards/netgen#21
+ Update Magic and Netgen to same versions as master
+  Update Readme to replace efabless links with OpenLane ones

* Update Magic/Netgen to Latest Versions

- Remove usb_cdc_core from fastestTestSet pending RTimothyEdwards/netgen#21

Co-authored-by: Osama Hammad <osama21@aucegypt.edu>

Some caveats:

- We do *NOT* install OpenROAD. We don't want to step on the OR team's toes.
- Centos not yet supported (too many environment variables to worry about atm)
- antmicro_yosys, cugr, drcu and openphysyn are all not built: annoying requirement set and they're all optional anyway
- Opendbpy is installed from donn/OpenROAD, until we upgrade to a version of OR that supports the python shell
- NO_DIAMOND_SEARCH_HEIGHT added as an option to suppress the -diamond_search_height option to the detailed placers
- Removed PS1 from environment management: zsh uses {} for interpolation which trips tcl up

* remove set CELL_PAD to 4 from all design configs, since it already exists in the PDK configs

* reset HDLL configs to HD

* reset HS configs to HD

* reset MS configs to HD

* reset LS configs to HD

* update the updateDesignsConfigs.py to follow the new report file conventions

* first round of config updates

* second pass of config updates

* Enable all Quitters by default

* allow cts to read multi-libs

* allow libtrim to handle the copying of the liberty files

* third pass of config updates

* update LS Benchmarks

* update HS benchmarks

* update HD benchmarks

* HDLL benchmark updates

* update MS benchmarks

- Similar adjustments need to be done to other designs

- Updating the clock period of all designs in hd to reduce the spef_wns by adjusting the CLOCK_PERIOD to the value of the suggested_clock_period of a previous regression run.

- Some designs were left with clock periods that produce a negative spef_wns to be used as a test of the functionality of the timing closure tools (OpenSTA, OpenPhySyn, and SPEF_EXTRACTOR)

- define FP_PIN_ORDER_CFG to point at a file like
  designs/spm/pin_order.cfg; supports python regexes
- able to place IOs randomly if -cfg is unused
- TODO: priority to user config